ĐTH - VideoAndMovie

Power Tools | Document Website | DTH

24:08

Power Tools | Document Website | DTH

1. GRAM - SCHIMIDT PROCEDURE

33:07

1. GRAM - SCHIMIDT PROCEDURE

2. OPTIMAL RECEIVER DESIGN

8:33

2. OPTIMAL RECEIVER DESIGN

3. DECISION REGION - ERROR PROBABILITY

48:13

3. DECISION REGION - ERROR PROBABILITY

4. UNION BOUND - IMPROVED UNION BOUND

15:48

4. UNION BOUND - IMPROVED UNION BOUND

5. BER - PER

11:59

5. BER - PER

LAB 5: GPIO - INPUT

1:35:46

LAB 5: GPIO - INPUT

LAB 4: GPIO - LCD

1:18:17

LAB 4: GPIO - LCD

LAB 3: GPIO - LED MATRIX 2

23:56

LAB 3: GPIO - LED MATRIX 2

LAB 3: GPIO - LED MATRIX 1

1:12:02

LAB 3: GPIO - LED MATRIX 1

LAB 2: GPIO - SCAN METHOD 2

44:52

LAB 2: GPIO - SCAN METHOD 2

LAB 2: GPIO - SCAN METHOD 1

43:52

LAB 2: GPIO - SCAN METHOD 1

LAB 1: GPIO - OUTPUT

2:16:32

LAB 1: GPIO - OUTPUT

LAB0: INTRODUCTION & SOFTWARE

1:24:13

LAB0: INTRODUCTION & SOFTWARE

CHAPTER 4: ASK - FSK - PSK

1:26:21

CHAPTER 4: ASK - FSK - PSK

Final Review 1: Z -Transform

1:47:47

Final Review 1: Z -Transform

Final Review 2: Z - Transform

14:46

Final Review 2: Z - Transform

Final Review 3: Fourier Transform

2:23:41

Final Review 3: Fourier Transform

Final Review 4: Fourier Transform

1:08:12

Final Review 4: Fourier Transform

VERILOG_LAB_5: FSM

1:22:10

VERILOG_LAB_5: FSM

DSP_Chapter 3: Review 3

49:00

DSP_Chapter 3: Review 3

DSP_LAB_3_P1

1:54:48

DSP_LAB_3_P1

VERILOG LAB_3: PULSE DIVISION

45:59

VERILOG LAB_3: PULSE DIVISION

DSP_Chapter 3: Review 1

2:34:06

DSP_Chapter 3: Review 1

DSP_Chapter 3: Review 2

45:19

DSP_Chapter 3: Review 2

VERILOG LAB_2: SSC - COUNTER PART 1

32:16

VERILOG LAB_2: SSC - COUNTER PART 1

VERILOG LAB_2: SSC - COUNTER PART 2

16:32

VERILOG LAB_2: SSC - COUNTER PART 2

DSP_Chapter 2: Review 1

1:36:39

DSP_Chapter 2: Review 1

DSP_Chapter 2: Review 2

1:36:38

DSP_Chapter 2: Review 2

DSP_Chapter 2: Review 3

1:40:14

DSP_Chapter 2: Review 3