Master Vitis Accelerated Libraries: Vitis HLS IP Creation & End-to-End Testing on PYNQ and DMA
37:16
Master Vitis Accelerated Libraries: Vitis HLS IP Creation & End-to-End Testing on PYNQ and DMA
Hardware Software Codesign for Embedded AI - Lecture 11 - Design Tools and Methods for Zynq MPSoC
36:05
Hardware Software Codesign for Embedded AI - Lecture 11 - Design Tools and Methods for Zynq MPSoC
Hardware Software Codesign for Embedded AI - Lecture 12 - Introduction to Vitis HLS Tool Flow
24:26
Hardware Software Codesign for Embedded AI - Lecture 12 - Introduction to Vitis HLS Tool Flow
Hardware Software Codesign for Embedded AI - Lecture 10 - Overview of Zynq MPSoC Architecture - II
42:55
Hardware Software Codesign for Embedded AI - Lecture 10 - Overview of Zynq MPSoC Architecture - II
Hardware Software Codesign for Embedded AI - Lecture 9 - Overview of Zynq MPSoC Architecture - I
34:35
Hardware Software Codesign for Embedded AI - Lecture 9 - Overview of Zynq MPSoC Architecture - I
Hardware Software Codesign for Embedded AI - Lab 6 - Creating resizer IP using Vitis HLS and Vivado.
56:33
Hardware Software Codesign for Embedded AI - Lab 6 - Creating resizer IP using Vitis HLS and Vivado.
Hardware Software Codesign for Embedded AI - Lab 5 - Kria KV260 Vitis AI Library Examples
1:19:04
Hardware Software Codesign for Embedded AI - Lab 5 - Kria KV260 Vitis AI Library Examples
Hardware Software Codesign for Embedded AI - Lab 3 - GPU and CUDA Programming
7:08
Hardware Software Codesign for Embedded AI - Lab 3 - GPU and CUDA Programming
Hardware Software Codesign for Embedded AI - Lab 2 - VGG 11 Training and Pruning
15:28
Hardware Software Codesign for Embedded AI - Lab 2 - VGG 11 Training and Pruning
Hardware Software Codesign for Embedded AI - Lab 4 - Kria KV260 Bring Up, Pynq and Petalinux
47:24
Hardware Software Codesign for Embedded AI - Lab 4 - Kria KV260 Bring Up, Pynq and Petalinux
Hardware Software Codesign for Embedded AI - Lecture 7 - GPU and CUDA
1:02:39
Hardware Software Codesign for Embedded AI - Lecture 7 - GPU and CUDA
Hardware Software Codesign for Embedded AI - Lecture 8 - FPGA vs Zynq vs Zynq MPSoC
58:52
Hardware Software Codesign for Embedded AI - Lecture 8 - FPGA vs Zynq vs Zynq MPSoC
Hardware Software Codesign for Edge AI - Lecture 5 - Pruning NN
48:21
Hardware Software Codesign for Edge AI - Lecture 5 - Pruning NN
Hardware Software Codesign for Embedded AI - Lab 01
29:55
Hardware Software Codesign for Embedded AI - Lab 01
Hardware Software Codesign for Embedded AI - Lecture 4
1:16:04
Hardware Software Codesign for Embedded AI - Lecture 4
Hardware Software Codesign for Embedded AI - Lecture 3
36:00
Hardware Software Codesign for Embedded AI - Lecture 3
Hardware Software Codesign for Embedded AI - Lecture 2
52:34
Hardware Software Codesign for Embedded AI - Lecture 2
Hardware Software Codesign for Embedded AI - Lecture 1
59:57
Hardware Software Codesign for Embedded AI - Lecture 1
Digital Design Difficult Questions #1 - Designing 3 bit non sequential synchronous counter
12:08
Digital Design Difficult Questions #1 - Designing 3 bit non sequential synchronous counter
How to run Pytorch on Google CLoud Platform and use Vitis AI to build xmodel file
30:14
How to run Pytorch on Google CLoud Platform and use Vitis AI to build xmodel file
Enabling GPU on Google Cloud using Free Credits and Installing Pytorch and Vitis AI
32:33
Enabling GPU on Google Cloud using Free Credits and Installing Pytorch and Vitis AI
Postman API Hackathon Submission: Building an End-to-End Bird Detection System using Flask
10:46
Postman API Hackathon Submission: Building an End-to-End Bird Detection System using Flask
Microprocessor Programming and Interfacing - Lab 10 - Procedures and Stacks
18:30
Microprocessor Programming and Interfacing - Lab 10 - Procedures and Stacks
Microprocessor Programming and Interfacing - Lab 9 - Advanced BIOS Interrupts for Display
23:52
Microprocessor Programming and Interfacing - Lab 9 - Advanced BIOS Interrupts for Display
Microprocessor Programming and Interfacing - Lab 8 - BIOS Interrupts fr Display
27:44
Microprocessor Programming and Interfacing - Lab 8 - BIOS Interrupts fr Display
Microprocessor Programming and Interfacing - Lab 7 - Advanced Operations using Interrupts
29:43
Microprocessor Programming and Interfacing - Lab 7 - Advanced Operations using Interrupts
Microprocessor Programming and Interfacing - Mid Semester Tips
6:14
Microprocessor Programming and Interfacing - Mid Semester Tips
Microprocessor Programming and Interfacing - Lab 6 - File operations in DOS
36:12
Microprocessor Programming and Interfacing - Lab 6 - File operations in DOS
Microprocessor Programming and Interfacing - Lab 5 - Dealing with Interrupts
46:50
Microprocessor Programming and Interfacing - Lab 5 - Dealing with Interrupts
Microprocessor Programming and Interfacing - Lab 4 - String operations in ALP
39:43
Microprocessor Programming and Interfacing - Lab 4 - String operations in ALP